1. Technical Field
This disclosure relates to semiconductor memories and more particularly, to trench capacitors having a center node to increase capacitive area and reduce charge leakage.
2. Description of the Related Art
Trench capacitor cells in dynamic random access memories (DRAMs) are commonly formed in a substrate. Trench capacitor cells include a trench having a storage node formed therein. The storage node acts as a first electrode to the trench capacitor. A buried plate is formed externally to the trench to form an outer plate of the trench capacitor, that is, the second electrode of the capacitor. The buried plate is formed by doping the silicon surrounding the etched trench which is then coated with a node dielectric and filled with a conductive material serving as the storage node or inner plate of the capacitor. The inner plate (or storage node) stores the signal charge and is connected to the drain of a transfer transistor switched by a wordline.
Referring to FIG. 1, the structure of a conventional trench capacitor is schematically shown. A bitline BL is connected to a source of a transfer transistor 12. A gate of transistor 12 is connected to a wordline WL. A drain of transistor is connected to a storage node 14 disposed withing a trench. A buried plate 16 is disposed in operative relationship to storage node 14 to form a trench capacitor. The trench capacitor is charged and discharged using bitline BL and wordline WL.
As smaller feature sizes are needed for future generations of trench capacitors, the conventional trench capacitors are pushed to the limits of their capabilities in terms of performance. One primary problem with DRAM designs using deep trench capacitor storage cells is maintaining a high capacity with decreasing feature size and keeping the charge in the deep trench from leaking out of the storage node. The conventional trench capacitors begin to lose capacitive area with smaller feature sizes and are susceptible to current leakage.
Therefore, a need exists for an improved trench capacitor for increasing capacitance and reducing current leakage therefrom.